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LPC2368FBD100 ARM Microcontroller Specificationby@lily-hathaway

LPC2368FBD100 ARM Microcontroller Specification

by Lily HathawayApril 16th, 2021
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The LPC2368FBD100 is a Arm7 microcontroller for embedded applications featuring a high level of integration and low power consumption at frequencies of 72 MHz. The Arm7 has 512 kB flash, 58 kB SRAM, Ethernet, CAN, SD/MMC, 4 UARTs, 2 CAN channels, 3 SSP/SPI, 3 I2C, I2S, 4 general purpose timers, 4 PWM, 4 USB controllers, and up to 70 general purpose I/O pins. It is pin-compatible to the LPC176x Cortex-M3 series.

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In this post, I will introduce you a series of products produced by NXP USA Inc.: LPC2368FBD100, there are two options:

LPC2368FBD100K


LPC2368FBD100,551

LPC2368FBD100 Overview

The LPC2368FBD100 is a Arm7 microcontroller for embedded applications featuring a high level of integration and low power consumption at frequencies of 72 MHz.

Features include up to 256 kB of flash memory, up to 58 kB of RAM, Ethernet MAC, USB Device/Host/OTG, DMA controller, SD/MMC, 4 UARTs, 2 CAN channels, 3 SSP/SPI, 3 I2C, I2S, 8-channel 10-bit ADC, 10-bit DAC, 2 PWM, 4 general purpose timers, low power Real-Time Clock with separate battery supply, and up to 70 general purpose I/O pins.

The LPC23xx are pin-compatible to the LPC176x Cortex-M3 series.

LPC2368FBD100 Features

ARM7 with 512 kB flash, 58 kB SRAM, Ethernet, USB 2.0 Device, CAN, SD/MMC, and 10-bit ADC.
  • Arm7TDMI-S™ processor, running at up to 72 MHz
  • Up to 512 kB on-chip flash program memory with In-System Programming (ISP)
  • 32 kB of SRAM on the Arm local bus for high performance CPU access
  • 8 kB SRAM for general purpose DMA use also accessible by the USB
  • 16 kB SRAM for Ethernet interface. Can also be used as general purpose SRAM
  • Dual Advanced High-performance Bus (AHB) system
  • Advanced Vectored Interrupt Controller (VIC)
  • General Purpose DMA controller (GPDMA) on AHB
  • Ethernet MAC with associated DMA controller
  • Four UARTs with fractional baud rate generation
  • USB 2.0 full-speed device with on-chip PHY
  • CAN controller with two channels
  • SPI controller
  • Two SSP controllers, with FIFO and multi-protocol capabilities
  • Three I2C-bus interfaces
  • I2S (Inter-IC Sound) interface for digital audio input or output
  • SD/MMC memory card interface
  • 70 general purpose I/O pins with configurable pull-up/down resistors
  • 10-bit ADC with input multiplexing among 6 pins
  • 10-bit DAC
  • Four general purpose timers/counters with a total of 8 capture inputs
  • One PWM/timer block with support for three-phase motor control
  • Real-Time Clock (RTC)
  • 2 kB SRAM powered from the RTC power pin
  • WatchDog Timer (WDT).
  • Standard Arm test/debug interface for compatibility with existing tools
  • Emulation trace module supports real-time trace
  • Single 3.3 V power supply (3.0 V to 3.6 V)
  • Four reduced power modes: idle, sleep, power-down, and deep power-down
  • Four external interrupt inputs configurable as edge/level sensitive
  • Processor wake-up from Power-down mode via any interrupt
  • Two independent power domains allow fine tuning of power consumption
  • Each peripheral has its own clock divider for further power saving
  • Brownout detect with separate thresholds for interrupt and forced reset
  • On-chip power-on reset
  • On-chip crystal oscillator with an operating range of 1 MHz to 24 MHz
  • 4 MHz internal RC oscillator trimmed to 1 % accuracy
  • On-chip PLL

LPC2368FBD100 Package

LQFP100
  • LQFP100, plastic low profile quad flat package;
  • 100 leads;
  • 0.5 mm pitch,
  • 14 mm x 14 mm x 1.4 mm body.

LPC2368FBD100 Operating Features

Parameter Value

Operating Frequency [Max] (MHz) 72

Flash (kB) 512

Ethernet 1

USB Controllers 1

CAN 2

UART 4

I2C 3

SPI 1

I2S 1

ADC (Channels) 1

ADC (bits) 10

DAC (bits) 10

SCTimer / PWM 1

Timers 1

Timer (bits) 32

PWM 1

Temperature range -40 °C to +85 °C

Supply voltage [min] (V) 3

Supply voltage [max] (V) 3.6

Product category 150-LPC2100/200/300/400-

LPC2368FBD100 Environmental

LPC2368FBD100 Quality

LPC2368FBD100 Application Note

Name/Description Modified Date

Using IAP for LPC2000 Arm® devices (REV 1.0) 21 Jul 2013

Migrating to the LPC1700 series (REV 1.0) 06 Oct 2009

Migrating to the LPC2300/2400 family (REV 1.0) 05 Feb 2007

LPC2368 Block Diagram